{{tag>[hardware CPU flags]}}

=====CPU Flags i7-6770HQ=====

**Intel(R) Core(TM) i7-6770HQ CPU @ 2.60GHz**

  * Source: [[https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/arch/x86/include/asm/cpufeature.h?id=refs/tags/v4.1.3]]

^ CPU Flag ^ description ^
| 3dnowprefetch | 3DNow prefetch instructions | 
| abm | Advanced Bit Manipulation | 
| acpi | ACPI via MSR (temperature monitoring and clock speed modulation) | 
| adx |ADCX and ADOX instructions | 
| aes | Advanced Encryption Standard | 
| aperfmperf | APERFMPERF | 
| apic | Onboard APIC | 
| arat | Always Running APIC Timer | 
| arch_perfmon | Intel Architectural PerfMon | 
| avx | Advanced Vector Extensions | 
| avx2 | AVX2 instructions | 
| bmi1 | 1st group bit manipulation extensions | 
| bmi2 | 2nd group bit manipulation extensions |   
| bts | Branch Trace Store | 
| clflush | Cache Line Flush instruction | 
| clflushopt | Provides unordered version of CLFLUSH | 
| cmov | CMOV instructions (conditional move) (also FCMOV) | 
| constant_tsc | TSC ticks at a constant rate | 
| cx16 | CMPXCHG16B | 
| cx8 | CMPXCHG8 instruction (64-bit compare-and-swap) | 
| de | Debugging Extensions (CR4.DE) | 
| ds_cpl | CPL Qual. Debug Store | 
| dtes64 | 64-bit Debug Store | 
| dtherm | Digital Thermal Sensor | 
| dts | Digital Thermal Sensor / Debug Trace Store ?| 
| eagerfpu | Non lazy FPU restore | 
| epb | IA32_ENERGY_PERF_BIAS support | 
| ept | Intel Extended Page Table | 
| erms | Enhanced REP MOVSB/STOSB | 
| est | Enhanced SpeedStep | 
| f16c | 16-bit fp conversions (CVT16) | 
| flexpriority | Intel FlexPriority | 
| fma | Fused multiply-add | 
| fpu | Onboard FPU (floating point support) | 
| fsgsbase | {RD/WR}{FS/GS}BASE instructions | 
| fxsr | FXSAVE/FXRSTOR, CR4.OSFXSR | 
| hle | Hardware Lock Elision | 
| ht | Hyper-Threading | 
| hwp | Hardware P-States | 
| hwp_act_window | HWP Activity window control | 
| hwp_epp | HWP energy/performance preference control | 
| hwp_notify | HWP Notification upon dynamic Guaranteed Performance change | 
| ida | Intel Dynamic Acceleration | 
| intel_pt | Intel Processor Tracing | 
| invpcid | Invalidate Processor Context ID | 
| lahf_lm | Load AH from Flags (LAHF) and Store AH into Flags (SAHF) in long mode | 
| lm | Long Mode (x86-64) | 
| mca | Machine Check Architecture | 
| mce | Machine Check Exception | 
| mmx | Multimedia Extensions | 
| monitor | Monitor/Mwait support (Intel SSE3 supplements) | 
| movbe | Move Data After Swapping Bytes instruction | 
| mpx | Memory Protection Extension | 
| msr | Model-Specific Registers (RDMSR, WRMSR) | 
| mtrr | Memory Type Range Registers | 
| nonstop_tsc | TSC does not stop in C states | 
| nopl | The NOPL (0F 1F) instructions | 
| nx | Execute Disable | 
| pae | Physical Address Extensions (support for more than 4GB of RAM) | 
| pat | Page Attribute Table | 
| pbe | Pending Break Enable (PBE# pin) wakeup support  | 
| pcid | Process Context Identifiers | 
| pclmulqdq | Perform a Carry-Less Multiplication of Quadword instruction — accelerator for GCM) | 
| pdcm | Performance Capabilities | 
| pdpe1gb | One GB pages (allows hugepagesz=1G) | 
| pebs | Precise-Event Based Sampling | 
| pge | Page Global Enable (global bit in PDEs and PTEs) | 
| pln | Intel Power Limit Notification | 
| pni | SSE-3 ("Prescott New Instructions") | 
| popcnt | Return the Count of Number of Bits Set to 1 instruction (Hamming weight, i.e. bit count) | 
| pse | Page Size Extensions (4MB memory pages) | 
| pse36 | 36-bit PSEs (huge pages) | 
| pts | Intel Package Thermal Status | 
| rdrand | Read Random Number from hardware random number generator instruction | 
| rdseed | The RDSEED instruction | 
| rdtscp | Read Time-Stamp Counter and Processor ID | 
| rep_good | rep microcode works well | 
| rtm | Restricted Transactional Memory | 
| sdbg | Silicon Debug | 
| sep | YSENTER/SYSEXIT | 
| smap | Supervisor Mode Access Prevention | 
| smep | Supervisor Mode Execution Protection | 
| ss | CPU self snoop | 
| sse | Intel SSE vector instructions | 
| sse2 | SSE2 | 
| sse4_1 | SSE-4.1 | 
| sse4_2 | SSE-4.2 | 
| ssse3 | Supplemental SSE-3 | 
| syscall | SYSCALL (Fast System Call) and SYSRET (Return From Fast System Call) | 
| tm | Automatic clock control (Thermal Monitor) | 
| tm2 | Thermal Monitor 2 | 
| tpr_shadow | Intel TPR Shadow | 
| tsc | Time Stamp Counter (RDTSC) | 
| tsc_adjust | TSC adjustment MSR 0x3b | 
| tsc_deadline_timer | TSC deadline timer |
| vme | Virtual Mode Extensions (8086 mode) |
| vmx | Hardware virtualization: Intel VMX |
| vnmi | Intel Virtual NMI |
| vpid | Intel Virtual Processor ID |
| x2apic | x2APIC | 
| xgetbv1 | XGETBV with ECX = 1 | 
| xsave | Save Processor Extended States: also provides XGETBY,XRSTOR,XSETBY | 
| xsavec | XSAVEC | 
| xsaveopt | Optimized Xsave | 
| xtopology | cpu topology enum extensions | 
| xtpr | Send Task Priority Messages |